[1] Mazloum, J. “A Low-power Wideband Receiver Front-end Employing Active and Passive N-path Filters”; Adv. Defence Sci. Technol. 2019, 10, 11-18.##
[2] Khalilpour, J. “Presentation of a Linear Adaptive System to Eliminate Single-Frequency Jammer Effect”; Adv. Defence Sci. Technol. 2018, 9, 51-58.##
[3] Xu,Y.; Chi, B.; Z. Wang, Z. “Power-Scalable Multi-Mode Reconfigurable Continuous-Time Lowpass/Quadrature Bandpass Sigma-Delta Modulator for Zero/Low-IF Receivers”; Proc. Int. Conf. Circuits and Systems 2012, 293-296.##
[4] Zhang, J.; Xu, Y.; Zhang, Z.; Sun, Y.; Wang, Z.; Chi, B. “A 10-b Fourth-Order Quadrature Bandpass Continuous-Time Sigma Delta Modulator With 33-MHz Bandwidth for a Dual-Channel GNSS Receiver”; IEEE Trans. Microwave Theory and Techniques 2017, 65, 1303-1314.##
[5] Pavan, S.; Schreier, R.; Temes, G. C. “Understanding Delta-Sigma Data Converters”; John Wiley & Sons, 2017.##
[6] Gerfers, F.; Ortmanns, M. “Continuous-Time Sigma-Delta A/D Conversion”; Springer Science & Business Media, 2006.##
[7] Shamsi, A.; Aghdam, E. N. “A Wideband Continuous Time Quadrature Delta Sigma Modulator Based on a Real DSM for Low Power WLAN Receiver”; J. Circuits, Systems and Computers 2018, 27,1850044.##
[8] Wang, W.; Zhu, Y.; Chan, C. H.; Martins, R. P. “A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS”; IEEE J. Solid-State Circuits 2018, 1-12.##
[9] Cho, Y. K.; Park, B. H. “Single Op-Amp Second-Order Loop Filter For Continuous-Time Delta–Sigma Modulators”; J. Electronics Letters 2015, 51, 619-621.##
[10] Moradi, R.; Farshidi, E.; Soroosh, M. “A Low Power Passive-Active ΔΣ Modulator with High-Resolution Employing an Integrator with Open-Loop Unity-Gain Buffer”; J. Integration 2019, 64, 137-142.##
[11] Moradi, R.; Farshidi, E.; Soroosh, M. “Digital Calibration of Memory Errors in Passive Sigma-Delta Modulator”; IETE J. Res. 2018, 1-8.##
[12] Shamsi, A.; Aghdam, E. N. “Continuous Time Feedforward Quadrature Delta Sigma Modulator Design Omitting the Power Hungry adders for LOW-IF Receivers”; J. Tabriz Electrical Engineering 2019, 49, 295-305.##
[13] Wang, Y.; Temes, G. C. “Noise-Coupled Continuous-Time ΔΣ ADCs”; Proc. Int. Conf. IEEE Circuits and Systems 2009, 341-344.##
[14] Lee, K. B.; Temes, G. “Digital Electronics Noise-Coupled DS ADCs”; J. Electronics Let. 2006, 42, 1381-1381.##
[15] Ho, C. Y.; Liu, C.; Lo, C. L.; Tsai, H. C.; Wang, T. C.; Lin, Y. H. “A 4.5 mW CT Self-Coupled Delta Sigma Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation”; IEEE J. Solid-State Circuits 2015, 50, 2870-2879.##
[16] Martin, K. W. “Complex Signal Processing is not Complex”; IEEE Trans. Circuits and Systems 2004, 51, 1823-1836,##
)
