Design and Simulation of Fourth-Order Low-Pass Gm-C Filter Based on CMOS Inverters With On-Chip Automatic Tuning

Document Type : Original Article

Authors

1 dep of engineering . Azad university of arak

2 Dep. of Electrical Eng. Science and Research branch, Tehran, Iran

3 Dep of engineering. Azad Arak University

Abstract

The study of low power wireless radio systems is an area in modern defense that especially deals with higher performance filters. In recent years, Gm-C filters have drawn attention due to their high frequency performance and integrability. In this paper, a fourth-order low-pass Gm-C filter with on-chip automatic tuning circuit is presented. The core of this filter is a low-voltage high-frequency CMOS inverter-based operational transconductance amplifier (OTA). To improve the linearity of the OTA, a new common-mode feedback (CMFB) circuit is presented that is combined with a common-mode feedforward (CMFF) circuit. Moreover, a new automatic tuning circuit is presented. By tuning the bulk voltage of transistors, this circuit compensates the effects of mismatches and temperature changes on the OTA, and therefore, on the filter cutoff frequency. Furthermore, this circuit consumes small portion of the power consumed by the filter. The circuits are designed and simulated in Cadence using TSMC 90nm CMOS technology and a 1 V power supply. The post-layout simulation results show that the DC differential gain, common-mode gain, -3 dB cutoff frequency and unity-gain frequency of the OTA are 34.7 dB, -26 dB, 255 MHz and 13.8 GHz, respectively. The cutoff frequency of the filter is 1 GHz, and by applying 0.2 Vp-p input voltages, the third-order intermodulation (IM3) of the filter at the cutoff frequency is -38 dB. The power consumption and the area of the filter are 4.8 mW and 0.043 × 0.038 mm2, respectively. Moreover, Monte Carlo simulations show the good robustness of proposed filter against the process errors.

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